Description

In this reference design, each port of the Ethernet FMC Max is connected to an AXI 1G/2.5G Ethernet Subsystem IP which is connected to the system memory via an AXI DMA IP.

AXI Ethernet design block diagram

Hardware Platforms

The hardware designs provided in this reference are based on Vivado and support a range of FPGA, MPSoC and ACAP evaluation boards. The repository contains all necessary scripts and code to build these designs for the supported platforms listed below:

Zynq UltraScale+ platforms

Target board

FMC Slot Used

Supported
Num. Ports

Standalone
Echo Server

PetaLinux

UltraZed-EV Carrier

HPC

4x

ZCU102

HPC0

4x

ZCU102

HPC1

4x

ZCU104

LPC

1x

ZCU106

HPC0

4x

ZCU111

FMCP

4x

ZCU208

FMCP

4x

ZCU216

FMCP

4x

Versal platforms

Target board

FMC Slot Used

Supported
Num. Ports

Standalone
Echo Server

PetaLinux

VCK190

FMCP1

4x

VCK190

FMCP2

4x

VEK280

FMCP

4x

VHK158

FMCP

4x

VMK180

FMCP1

4x

VMK180

FMCP2

4x

VPK120

FMCP

4x

VPK180

FMCP

4x

Software

These reference designs can be driven by either a standalone application or within a PetaLinux environment. The repository includes all necessary scripts and code to build both environments. The table below outlines the corresponding applications available in each environment:

Environment

Available Applications

Standalone

lwIP Echo Server

PetaLinux

Built-in Linux commands
Additional tools: ethtool, phytool, iperf3